====== Scanner Shield CCA & DVI Breakout ====== Scanner Shield CCA Revision: 1 Aug 2016 DVI Breakout Revision: 29 Jul 2016 {{monitor:scanner_shield_rev1aug2016_with_dvi_breakout_rev29jul2016.jpg?450}} {{monitor:scanner_shield_rev1aug2016_front.jpg?450}} {{monitor:scanner_shield_rev1aug2016_back.jpg?450}} {{monitor:dvi_breakout_rev29jul2016_front.jpg?450}} {{monitor:dvi_breakout_rev29jul2016_back.jpg?450}} {{monitor:scanner_shield_prototype_1aug2016_pcb.png?450}} **{{monitor:scanner_shield_prototype_1aug2016_sch.pdf|PDF of current schematic}}** **Annotated original schematic**\\ {{monitor:scanner_shield_dr_smalley_original_schematic_drew_annotations.jpg?300}} ---- ===== Download ===== {{monitor:scanner_shield_cca_1aug2016.zip|Download Scanner Shield CCA Eagle & Gerber Files (1 Aug 2016 release)}}\\ ---- ===== Purpose ===== The Scanner Shield is the combination of the Synchronization & Galvo boards. It is meant to simplify interconnections between these boards (by being on the same board) and simplify power connections (having the ATX power supply have Molex connectors, bypassing the need for a solderless connector bus and cutting down assembly time. Only the power connector will be a Molex connector; all other connectors will be simpler snap-on ribbon connectors or plain .1" headers, thus further reducing assembly time. Also, the power transistor (now in a TO-220 package) will be soldered directly to the board, eliminating the assembly of another cable. A critical feature of this board is the [[http://ww1.microchip.com/downloads/en/DeviceDoc/21953a.pdf|MCP4822]], a dual-output, internal voltage referenced 12-bit SPI DAC. This DAC will allow us to scan up to a max of 4096 lines, if needed. It will also replace the sensitive "Main Control Knob" that had to be manually adjusted every time the monitor was started. The manual adjustment behavior will be replaced by a software state machine. Other control circuit options were also introduced for experimentation, as detailed below. When the system locks, the polygon tachometer (PTACH) and divided h-sync (DSYNC) signal transitions occur within roughly +/-100ns, as shown below. In the below image, the top line is DSYNC, and the bottom line is PTACH. {{monitor:locked_phase_error_oscope.jpg}} ---- ===== Design ===== For editing, the Scanner Shield Eagle files are available at "__J:\groups\holography\~Monitor Development\~Scanner Shield CCA__". Several source documents and Falstad simulation files are available at "__J:\groups\holography\~Monitor Development\~Synchronization CCA\Synchronization CCA Revision Nov 2015__". The Nov. 2015 revision of the Sync CCA was pulled into the Scanner Shield CCA. {{scanner_shield_prototype_1aug2016_grouping.png}} There are essentially 7 hardware sections of the Scanner Shield: * Power * Galvo control * Polygon control * DVI breakout * DAC * PWM ports * Arduino Mega 2560 ==== Power ==== The power section is meant to have a 5-pin male Molex connector; the female end is supposed to be attached directly to the ATX power supply cables. LED pads are available to indicate what buses are active (if any have shorted out). There is a -5V linear regulator (U3) which supplies 100mA. There are several buffer capacitors throughout the board to help prevent supply ripples. These buffer capacitors are placed as close as possible to their loads. Two capacitors (usually two orders of magnitude difference in value) are sometimes used where sensitivity might be an issue. There are 3 options for the +5V supply: the Arduino onboard regulator (max 200mA), the ATX power supply (couple of amps), and the ESC when installed. The tachometer laser has burned out 8mil supply traces before, and the ESC is optional, so the ATX power supply was chosen to power all +5V devices. That being said, SJ1/SJ2 are available to switch the Arduino to its own +5V supply, powered off of the +12V bus. To use this mode, cut the trace within SJ1 and between SJ1-SJ2, then solder the SJ2 pads together. There are two ground clips for oscilloscopes to connect to: TP_G5 and TP_G4. ==== Galvo Control ==== The job of this circuit is to turn a single DAC output into a differential signal that common galvos can use. Potentiometer AMPL controls the vertical size of the output image (distance between scan lines). Potentiometer BIAS changes the vertical position of the image. Changing one parameter won't affect the other. The GALVO_PORT was designed to accompany all possible 3-pin combinations that galvo manufacturers might use. We've had galvos in the past were the connector was [+SIG -SIG GND] or [+SIG GND -SIG]. This port will allow us to not have to switch the pins in the connector around. One primary purpose of this board was to upgrade the DAC to >256 scan levels. A 12-bit (4096 values) DAC was chosen to provide us with as many as we'd want for the foreseeable future. R25 and R24 are resistors meant to limit current if GAL- and GAL+ outputs are accidentally shorted to ground. **[[http://falstad.com/circuit/circuitjs.html?cct=$+1+0.000005+16.81741416518454+57+5+50%0Av+32+288+112+288+0+4+80+2.048+2.048+0+0.5%0Ag+32+288+16+288+0%0Aw+544+432+544+496+0%0Aw+688+336+688+416+0%0Ar+544+336+688+336+0+1000%0Ar+448+336+544+336+0+1000%0Aw+544+336+544+400+0%0AO+688+416+752+416+0%0Ar+224+352+176+352+0+1440%0Ar+224+352+272+352+0+1000%0Ag+272+352+272+368+0%0AR+176+352+176+384+0+0+40+5+0+0+0.5%0Aa+304+336+384+336+1+5+-5+1000000%0Aw+304+352+304+416+0%0Aw+384+416+384+336+0%0Aw+240+320+304+320+0%0A174+224+352+240+288+0+100000+0.9653+Amplitude%0Ar+496+416+496+464+0+2500%0A174+496+464+496+528+0+10000+0.2525+Bias%0AR+496+416+496+384+0+0+40+5+0+0+0.5%0Aw+512+496+544+496+0%0Aw+448+336+384+336+0%0Aw+112+288+224+288+0%0Ar+688+336+816+336+0+1000%0Ar+816+336+944+336+0+1000%0Aw+816+400+816+336+0%0Aw+944+336+944+416+0%0Ag+816+432+816+464+0%0AO+944+416+992+416+0%0Aa+544+416+688+416+0+5+-5+1000000%0Aa+816+416+944+416+0+5+-5+1000000%0Ar+496+528+496+576+0+7500%0AR+496+576+496+608+0+0+40+-5+0+0+0.5%0Ax+616+534+710+537+0+12+1.25V+--%3E+0V+bias%0AO+544+496+576+496+1%0Ax+612+568+714+571+0+12+-1.25V+--%3E+-5V+bias%0Ax+616+499+710+502+0+12+3.75V+--%3E+5V+bias%0Ax+616+551+724+554+0+12+0.00V+--%3E+-2.5V+bias%0Ax+616+516+720+519+0+12+2.50V+--%3E+2.5V+bias%0Ax+191+498+339+501+0+12+op-amps+supplied+with+/-5V%0Ax+8+217+136+220+0+20+DAC+0-4.096V%0Ax+163+216+417+219+0+20+Amplitude+(2.048V+centered)%0Ax+448+218+677+221+0+20+Bias+(and+inverted+output)%0Ax+744+220+919+223+0+20+Non-inverted+output%0Ar+384+416+304+416+0+220%0Ar+304+416+224+416+0+1000%0Ag+224+416+224+432+0%0Ao+0+16+0+290+5+0.00009765625+0+-1%0Ao+15+16+0+290+5+0.00009765625+1+-1%0Ao+21+16+0+290+5+0.0015625+2+-1%0Ao+28+16+0+290+9.353610478917778+2.44140625e-55+3+-1%0Ao+7+16+0+290+9.353610478917778+4.8828125e-55+3+-1%0A|Falstad simulation of voltage scaling for Galvo here.]]** [[http://falstad.com/circuit/circuitjs.html?cct=$+1+0.000005+16.81741416518454+57+5+50%0Av+48+288+128+288+0+4+80+2.048+2.048+0+0.5%0Ag+48+288+32+288+0%0Aw+544+432+544+496+0%0Aw+688+336+688+416+0%0Ar+544+336+688+336+0+1000%0Ar+448+336+544+336+0+1000%0Aw+544+336+544+400+0%0AO+688+416+752+416+0%0Ar+80+416+80+368+0+1440%0Ar+80+416+80+464+0+1000%0Ag+80+464+80+480+0%0AR+80+368+80+336+0+0+40+5+0+0+0.5%0Aa+320+336+400+336+1+5+-5+1000000%0Aw+320+352+320+416+0%0Aw+400+416+400+336+0%0Aw+256+320+320+320+0%0A174+240+352+256+288+0+100000+0.9851000000000001+Amplitude%0Ar+496+416+496+464+0+2500%0A174+496+464+496+528+0+10000+0.5+Bias%0AR+496+416+496+384+0+0+40+5+0+0+0.5%0Aw+512+496+544+496+0%0Aw+448+336+400+336+0%0Aw+128+288+240+288+0%0Ar+688+336+816+336+0+1000%0Ar+816+336+944+336+0+1000%0Aw+816+400+816+336+0%0Aw+944+336+944+416+0%0Ag+816+432+816+464+0%0AO+944+416+992+416+0%0Aa+544+416+688+416+0+5+-5+1000000%0Aa+816+416+944+416+0+5+-5+1000000%0Ar+496+528+496+576+0+7500%0AR+496+576+496+608+0+0+40+-5+0+0+0.5%0Ax+616+534+710+537+0+12+1.25V+--%3E+0V+bias%0AO+544+496+576+496+1%0Ax+612+568+714+571+0+12+-1.25V+--%3E+-5V+bias%0Ax+616+499+710+502+0+12+3.75V+--%3E+5V+bias%0Ax+616+551+724+554+0+12+0.00V+--%3E+-2.5V+bias%0Ax+616+516+720+519+0+12+2.50V+--%3E+2.5V+bias%0Ax+161+548+325+551+0+12+op-amps+supplied+with+5V,+-5V%0Ax+8+217+136+220+0+20+DAC+0-4.096V%0Ax+163+216+417+219+0+20+Amplitude+(2.048V+centered)%0Ax+448+218+677+221+0+20+Bias+(and+inverted+output)%0Ax+744+220+919+223+0+20+Non-inverted+output%0Ar+400+416+320+416+0+220%0Ar+320+416+240+416+0+1000%0Ag+240+416+240+432+0%0Aa+128+432+208+432+1+15+-15+1000000%0Aw+80+416+128+416+0%0Aw+128+448+128+480+0%0Aw+128+480+208+480+0%0Aw+208+480+208+432+0%0Aw+208+432+208+352+0%0Aw+208+352+240+352+0%0AO+80+416+32+416+1%0Ao+0+16+0+290+5+0.00009765625+0+-1%0Ao+15+16+0+290+5+0.00009765625+1+-1%0Ao+21+16+0+290+5+0.003125+2+-1%0Ao+28+16+0+290+4.676805239458889+2.44140625e-55+3+-1%0Ao+7+16+0+290+4.676805239458889+4.8828125e-55+3+-1%0A|Unreleased improvement (Fri19Aug2016).]] ==== Polygon Control ==== There were several attempts to build a hardware loop filter for the polygon mirror. A [[monitor:drew#mon_11_jul_2016|breadboard version]] was made where different filters were tested, but we could only get it to lock "perfectly" (no visible jitter) with the legacy circuit (interestingly, the /2 frequency dividers were needed as well). One primary purpose of this board was to replace the "Main Control Knob" ("DCBIAS" in the [[monitor:synchronization_cca#design|legacy circuit]]) that was manually adjusted every time the monitor was powered in order to get the polygon mirror to lock with no visible jitter or oscillation. This knob was replaced by a DAC and scaler circuit (op-amps IC10A and IC10B) so that manual adjustment would no longer be needed. **[[http://falstad.com/circuit/circuitjs.html?cct=$+1+0.000005+5.023272298708818+50+5+50%0AR+256+256+224+256+0+1+570+2.5+2.5+0+0.5%0Aa+320+208+400+208+1+24+-5+1000000%0Ar+320+256+256+256+0+1000%0Ar+320+256+384+256+0+1000%0Aw+400+208+400+256+0%0Aw+400+256+384+256+0%0Aw+320+224+320+256+0%0Ag+256+160+224+160+0%0Ar+320+160+256+160+0+1000%0Ar+320+160+400+160+0+1000%0Aw+320+160+320+192+0%0AR+400+160+432+160+0+0+40+5+0+0+0.5%0Ax+283+303+391+306+0+18+0-5V+--%3E+5-0V%0Ax+63+262+197+265+0+18+PLL+Output+0-5V%0Ax+28+504+197+507+0+18+PLL+Output+0-4.096V%0Ax+263+542+406+545+0+18+0-4.096V+--%3E+5-0V%0AR+400+400+432+400+0+0+40+5+0+0+0.5%0Aw+320+400+320+432+0%0Ar+320+400+400+400+0+1220%0Ar+320+400+256+400+0+1000%0Ag+256+400+224+400+0%0Aw+320+464+320+496+0%0Aw+400+496+384+496+0%0Aw+400+448+400+496+0%0Ar+320+496+384+496+0+1000%0Ar+320+496+256+496+0+819.2%0Aa+320+448+400+448+1+24+-5+1000000%0AR+256+496+224+496+0+1+570+2.048+2.048+0+0.5%0Aw+400+256+496+256+0%0Aw+400+448+496+448+0%0Ap+496+256+496+448+0%0Aa+672+448+752+448+1+24+-5+1000000%0Aw+400+496+592+496+0%0Ar+592+496+672+496+0+3125%0Ar+592+400+672+400+0+2720%0Ar+672+400+752+400+0+7280%0Ar+672+496+752+496+0+5000%0Aw+672+464+672+496+0%0Aw+672+432+672+400+0%0Aw+752+448+752+496+0%0Ag+592+400+560+400+0%0AR+752+400+784+400+0+0+40+24+0+0+0.5%0Ax+828+502+972+505+0+18+Motor+Input+9-17V%0AO+672+400+672+352+1%0AO+320+400+320+352+1%0AO+320+160+320+112+1%0Ax+626+541+744+544+0+18+5-0V+--%3E+9-17V%0AO+752+496+800+496+0%0Ao+0+2+0+290+9.353610478917778+0.001461501637330903+0+-1%0Ao+27+2+0+290+4.374501449566024+0.002734063405978765+0+-1%0Ao+4+2+0+290+9.353610478917778+0.001461501637330903+1+-1%0Ao+23+2+0+290+9.353610478917778+0.002923003274661806+1+-1%0Ao+30+2+0+290+0.01953125+0.00009765625+2+-1%0Ao+39+8+0+290+20+0.0015625+3+-1%0A|Falstad simulation of 0-(4.096 or 5)V to 9-17V scaling for Polygon Motor here.]]** An optional pulse stretcher (D7,R5,C19,D1) was added to the dual inverters (U5) that condition the tachometer output. The dual inverters are from [[http://www.ti.com.cn/cn/lit/ds/symlink/sn74lvc2g14.pdf|Texas Instrument's SN74LVC2G14]], which was specifically chosen so that the tachometer's max 3.28V output could be counted as a logical high to the inverters. The pulse stretcher is optional and its values are not yet determined. Solder the pads of D7 together and leave R5, C19, and D1 uninstalled if no pulse stretching is to be done. The HSYNC hardware divider circuit was upgraded to a single 8-bit divider (IC3) controlled in software. The option to bypass the hardware divider exists through JP6 (see below). If bypassed/not installed, use interrupts from the HSYNC line (Pin 18), short JP6 pins 1-2, and output results to Pin 37 (DIV_P0 / PortC bit 0). Tests will be done to see how the hardware divider compares to software interrupt-driven dividers (latency, jitter, processor load). Several other options for controlling the polygon mirror have been incorporated into this board. ^ Primary Polygon Control Modes ^^^^^^^ | || JP6 | JP2,JP3 | JP4 | JP9,JP10 | JP8 | | Legacy | Uses phase-comparator output. Best visual results so far. | 3-2 | 1-2 | 3-2 | 3-2 | 1-2 | | DAC Only | Control polygon voltage directly with DAC (ie, software loop filters) | n/a | n/a | n/a | 1-2 | 1-2 | | Enable Toggle | Control polygon speed by toggling (via PWM) driver enable line (Pin 45) | n/a | n/a | n/a | n/a | 3-2 | ^ Jumper Settings (defaults emphasized) ^^^ | JP6 | 1-2 | Software divider (output to Pin 37); bypasses hardware divider | | ::: | __**3-2**__ | Hardware divider; set value (2-256) to Port C | | JP2,JP3 | __**1-2**__ | Divide signals going into phase comparator by 2 | | ::: | 3-2 | Pass signals directly to phase comparator | | JP4 | 1-2 | Use PC2 output | | ::: | __**3-2**__ | Use PCP (PP) output | | JP9,JP10 | 1-2 | Polygon voltage directly controlled by DAC | | ::: | __**3-2**__ | Polygon voltage controlled with DAC & phase comparator | | JP8 | __**1-2**__ | Polygon voltage controlled with hardware/software | | ::: | 3-2 | Polygon voltage set to +24V; toggle POLY_ENABLE (Pin 45) for control | ===== DVI Breakout ===== The DVI Breakout board is simply meant to make available several signals in the DVI-I port, namely, the RGB analog outputs, H/VSync signals, [[https://en.wikipedia.org/wiki/Display_Data_Channel|DDC]]/[[https://en.wikipedia.org/wiki/Extended_Display_Identification_Data|EDID]]/[[https://en.wikipedia.org/wiki/I%C2%B2C|I2C]] bus, Hot Plug signal, and +5V supply from the graphics card. As well, three extra control signals (GPIOs) were included from the Arduino: MIXAMP0, MIXAMP1, and 75Ohm_Ena. (The 10-position ribbon cable had unused positions available). MIXAMP0 & MIXAMP1 don't yet have any defined function, but it's envisioned that they could somehow be useful in controlling/sensing the configuration of the Mixer Amplifier boards or other devices. 75Ohm_Ena is meant to toggle a DC-capable 75 Ohm load to trigger/enable the graphics card's analog outputs. The complete functionality of these signals have yet to be determined. Close up of the Schottky diode installation: {{monitor:dvi_breakout_rev29jul2016_diode_detail.jpg?450}} The two capacitors next to the EEPROM chip are .1uF and 10uF. The interface pinout is as follows on both the Breakout Board and Scanner Shield: {{monitor:scanner_shield_prototype_1aug2016_dvi_breakout_port.png}} ^ Pin ^ Driver ^ Description ^ | VSY | Graphics Card | VSYNC from graphics card | | HSY | Graphics Card | HSYNC from graphics card | | HOT | Arduino | HOT_PLUG to graphics card | | 75E | Arduino | Option to toggle 75-ohm load on green analog output | | MA0 | Arduino | Digital output for optional Mixer-Amplifier circuit control | | GND | Both | Ground | | +5V | Arduino | +5V from ATX power supply for powering EDID EEPROM | | SDA | Both | I2C Data, directly shared between Arduino and graphics card | | SCL | Both | I2C Clock, directly shared between Arduino and graphics card | | MA1 | Arduino | Digital output for optional Mixer-Amplifier circuit control | All signals are +5V digital. **WARNING:**Several of these signals connect DIRECTLY to interface pins on the graphics card, without any ESD protection. Be careful not to assemble the ribbon-cable incorrectly or discharge static electricity into these traces (or anywhere near any electronics). VSYNC, HSYNC, HOT_PLUG, SDA, SCL, and GND connect directly to their respective pins in the DVI connector. +5V is from the ATX power supply and does not connect to the graphics card +5V output. The +5V trace running from the ATX power supply (PWR_PORT) to the DVI Port is only 0.008" (8mils) and is not intended to provide substantial current. It's only intended to power the EDID EEPROM when the DVI Breakout board is not connected to the graphics card. HOT (HOT_PLUG) is used to signal to the graphics card that a monitor as been attached/detached. It is hoped that the Arduino can toggle this to virtually disconnect/reconnect the HoloMonitor, thus forcing the host computer to reload the EDID resolution settings without having to manually unplug/replug the DVI/VGA cable. Typically in VGA-DVI passive adapters, the graphics card's +5V output is shorted to the HOT_PLUG input pin. See [[http://www.cs.unc.edu/~stc/FAQs/Video/dvi_spec-V1_0.pdf|Sec. 2.2.9 of DVI specification]]. The EDID EEPROM on the DVI Breakout Board can be programmed through the I2C clock and data lines. It requires +5V, which can come from the Scanner Shield or the graphics card. The two +5V power supplies coexist by having two opposing Schottky diodes separate the two supplies on the Breakout Board, with the EEPROM load in between. After the Hot Plug event, the graphics card will query the EDID EEPROM. Because the I2C lines are directly shared between the EEPROM, graphics card, and Arduino, the Arduino can see this traffic and possibly interfere with it if incorrectly programmed. Care should be taken not to program the EEPROM from the Arduino while the computer is reading it. The Arduino probably can't replace the EEPROM (acting as an I2C slave), because of size limitations to its internal I2C buffer (although this hasn't been proven yet). The EEPROM is at 7-bit slave address 0x50 and has one address byte (max EEPROM size of 256 bytes). See the [[http://ww1.microchip.com/downloads/en/DeviceDoc/21709c.pdf|24AA02 datasheet]]. The Arduino might not need to activate pull-up resistors for the I2C bus; the graphics card may already be doing this. 75E (75OHM_ENA) is for toggling an optional 75-ohm load. Some graphics cards detect there's a monitor attached by detecting if there's a 75-ohm load on any/green analog output. However, this might cause impedance mismatching when in parallel with 50-ohm loads. MA0/MA1 (MIXAMP0/MIXAMP1) are optional digital Arduino outputs (or inputs) in case there's anything we'd want to control digitally on the Mixer-Amplifier boards, like RF switches for bypassing upconverters. The ribbon-cable that is made to connect the Scanner Shield to the DVI breakout board should be 1:1, that is, with the ribbon-cable flat, both connectors should be on the same side, and their key tabs should be pointing the same direction: The ferrite core is meant to block RF signals leaked from the Mixer-Amplifier board. {{scanner_shield_prototype_1aug2016_1to1_ribbon_cable.jpg}} ==== DAC ==== The DAC being used is a dual-output 12-bit SPI internally-regulated [[http://ww1.microchip.com/downloads/en/DeviceDoc/21953a.pdf|MCP4822]]. It has a SPI clock speed of 20 MHz and a settling time of 4.5 us (max 222.2 kHz update rate). It uses a 2.7-5.5V supply and has a selectable internal reference of 2.048V or 4.096V. A DAC with an internal precision voltage reference was used so that command values in software wouldn't have to change. The DAC controls the galvo stepping and polygon control voltages independently. ==== PWM Ports ==== The polygon mirror uses a 3-phase brushless driver, which is very similar to the motors of most electronic model aircraft (ie, drones). The option was given for an Electronic Speed Controller (ESC), typically used for model aircraft, to interface with the Scanner Shield. ESCs have an "S" rating, indicating what voltage range they accept (1S = 3.7V to 4.2V). Since +12V is available, any "3S" ESC can be used. ESCs have different RPM ("kv") ratings, continuous current ratings, and firmware options (factory / SimonK / BLHeli). Further experiments should be made to see if these can replace the HA13535 circuit. Ports: * JP5 - +12V power & ground * JP1 - standard ESC interface; center pin is unused (+5V output from ESC) * polarity of these ports are labeled in the silkscreen ("S" = PWM signal) ==== Arduino Mega 2560 ==== Header installation points: {{monitor:scanner_shield_prototype_1aug2016_arduino_mega_2560_connections.png}} **Note:** the Reset pad is covered by the laser scanner assembly port. Don't install a pin there. Electrical schematic: {{monitor:scanner_shield_prototype_1aug2016_arduino_mega_2560_connections_schematic.png}} Interrupts: * Pin 2: (in) DSYNC - needed for galvo control (either DSYNC or HSYNC) * Pin 3: (in) POLY_TACH - enhances polygon speed control * Pin 18: (in) HSYNC - needed for galvo control (either DSYNC or HSYNC) * Pin 19: (in) VSYNC - needed for galvo control * Pin 20: (both) I2C SDA - not used as interrupt * Pin 21: (both) I2C SCL - not used as interrupt DVI Breakout: * Pin 22: (out) HOT_PLUG - virtually reconnect HoloMonitor; force EDID read * Pin 23: (out) 75OHM_ENA - optional trigger for graphics card monitor detection * Pin 24: (out) MIXAMP0 - optional Mixer-Amplifier control signal * Pin 25: (out) MIXAMP1 - optional Mixer-Amplifier control signal Hardware Divider: * Port C (Pins 30-37): (out) write divider value directly to Port C * (note: Pins are in reverse order; Pin 37=>PC0=>DIV_P0, Pin 30=>PC7=>DIV_P7) PWM: * Pin 4: (out) PWM signal for ESC control * Pin 45: (out) POLY_ENABLE for toggled enable control Polygon Control: * Pin 45: (out) POLY_ENABLE - Set high for continuous operation; optional speed control via internal PWM HW module * Pin 46: (in) POLY_LOCKED - HA13535 Pin 13, open-collector indicator of when polygon mirror is within +/-1.6% of target speed; goes low when locked DAC: * Pin 49: (out) CS_DAC - used instead of Arduino Pin 53 to not conflict with Arduino SPI Slave Mode * Pin 50: (in) MISO - currently unused * Pin 51: (out) MOSI * Pin 52: (out) SCK Power: * ATX +5V connected to Arduino 5V line and VIN * option to sever ATX +5V from Arduino 5V and connect ATX +12V to VIN through SJ1/2 ---- =====Construction Progress===== All SMDs (except for C19 and R5) soldered in: {{:monitor:scanshield:scanner_shield_prototype_1aug2016_smd_done.jpg?300|}} With Ports, Jumpers, Headers, and Ports done: {{:monitor:scanshield:scanner_shield_prototype_1aug2016_smd_jmp_ports_done.jpg?400|}} Everything but the Power Transistor: {{:jesse:monitor_fall2016:scanshieldcca_oct2016:20161024_all_but_power_trans.jpg?400|}} Everything in: {{:jesse:monitor_fall2016:scanshieldcca_oct2016:20161028_done.jpg?400|}} Voltage Rail Tests: * -5V/-12V: {{:jesse:monitor_fall2016:scanshieldcca_oct2016:20161028_volt_test_-5v-12v.jpg?300}} * +5V: {{:jesse:monitor_fall2016:scanshieldcca_oct2016:20161028_volt_test_5v.jpg?300}} * +12V: {{:jesse:monitor_fall2016:scanshieldcca_oct2016:20161028_volt_test_12v.jpg?300}} * +24V: {{:jesse:monitor_fall2016:scanshieldcca_oct2016:20161028_volt_test_24v.jpg?300}} * ATX Power Supply: {{:jesse:monitor_fall2016:scanshieldcca_oct2016:20161028_atx_supply_test.jpg?300}} ---- =====Upcoming Changes===== ====DSYNC Timer Synchronization==== Up till now, the DSYNC timer hasn't had any means of synchronizing with VSYNC. This means that the image could begin anywhere on the screen, dependent on how many HSYNC cycles the timer is from starting with VSYNC. After some experimentation, we've created an edge-triggered pulse generator hooked to the //Asynchronous Preset// pin of the counter. This will restart the timer with each VSYNC pulse, ensuring that DSYNC pulses occur at the same time as VSYNC pulses, the same as HSYNC pulses do. The new counter schematic is as follows: {{:jesse:immerse-2017:20170802_timer_schema.png}} \\ The NAND gate on the right is acting as an inverter (as opposed to a discrete inverter for simplicity's sake), with the second switching to generate the reset pulse. The values for R1 and C1 are determined experimentally. At the moment, C1 = 60nF and R1=5.6Ω for the breadboarded circuit. We'll redetermine the values once we can assemble this on a PCB. For more detail see [[monitor:jesse:log_2017#aug_2017completed_timer_sync|Jesse's log]]. ---- ===== Errata ===== Rev. 1 Aug 2016 mistakes & notes: (corrected as of Rev. 29 Aug 2016) * **CRITICAL**: pins 1 & 2 of the -5V regulator are SWAPPED! I had mistakenly assigned pin 1 (left) as VIN and pin 2 (center) as GND, whereas it's the opposite in the datasheet. FORTUNATELY, there's an easy patch for this (pictured below). This is now fixed in the library/PCB layout as of Rev. 10 Aug 2016. * **CRITICAL**: The tachometer works intermittently on the Rev. 1 Aug 2016 board. On the working HoloMonitor, with the Rev. 10 Mar 2015 Synchronization CCA, there was a voltage divider (R7+R8) that created 2.14V for "V11" and "V22" in the tachometer/motor connector. This potentiometer was removed and replaced with a resistor that pulled the voltage up to 5V. "V11" and "V22" connect to pins VL1 and VL2 on the M66510FP, the IC on the laser/photodiode board. There's a few lines in the M66510FP's datasheet stating the voltage on these pins should be 0<(VL1, VL2)